The critical dimensions associated with integrated circuits continue to grow ever smaller. For example, contact holes and via holes which allow communication between levels now have dimensions that are often less than 1/4 micron. Thus, dimensional control of photoresist masks can be a difficult problem because of phenomena such as the optical proximity effect. Also, problems such as under-cutting and slow consumption of the photoresist mask by the etchant become major problems. The latter difficulty is often overcome by using a hard mask i.e. a mask made of material other than photoresist which is much more resistant to the etchant. To overcome the former difficulty, standard optical proximity corrections are often used in conjunction with an anti-reflection coating (ARC). The present invention sets out to combine both remedies into a single process.
In the course of searching the literature we have found a number of references that deal with aspects of the problem but none that dealt with it in exactly the manner of the present invention. The following were found to be of interest:
Yoo (U.S. Pat. No. 5,670,423 SEPTEMBER 1997) describes a method for using a disposable hard mask for control of gate critical dimension. He shows the use of titanium as a bottom ARC (anti-reflection coating). A feature of the invention is that the hard mask is disposable. Nulty et al. (U.S. Pat. No. 5,468,342 November 1995) also teaches how an oxide layer may be etched by using such a hard mask. Miyazaki (U.S. Pat. No. 5,595,938 JANUARY 1997) shows how a metal may be patterned by using a metal oxide ARC layer. This allows the interconnection layer and the anti-reflection layer to be treated with the same etchant. Havemann et al. (U.S. Pat. No. 5,661,344 August 1997) also describes how a via hole may be formed by using an oxide hard mask.